Demonstrating quantum error mitigation on logical qubits

Abstract

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A long-standing challenge in quantum computing is developing technologies to overcome the inevitable noise in qubits. To enable meaningful applications in the early stages of fault-tolerant quantum computing, devising methods to suppress post-correction logical failures is becoming increasingly crucial. In this work, we propose and experimentally demonstrate the application of zero-noise extrapolation, a practical quantum error mitigation technique, to error correction circuits on state-of-the-art superconducting processors. By amplifying the noise on physical qubits, the circuits yield outcomes that exhibit a predictable dependence on noise strength, following a polynomial function determined by the code distance. This property enables the effective application of polynomial extrapolation to mitigate logical errors. Our experiments demonstrate a universal reduction in logical errors across various quantum circuits, including fault-tolerant circuits of repetition and surface codes. We observe a favorable performance in multi-round error correction circuits, indicating that this method remains effective when the circuit depth increases. These results advance the frontier of quantum error suppression technologies, opening a practical way to achieve reliable quantum computing in the early fault-tolerant era.

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I Introduction

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Suppressing errors is a problem that lies at the center of quantum computing technologies. Quantum error correction and mitigation are the two generic methods of error suppression. Error correction promises to reach an arbitrarily high fidelity provided sufficient qubit resources. Recently, experiments have demonstrated a positive gain in the surface code error correction when scaling the code distance up to 7 [1]. However, it is still viewed as a long-term goal to achieve negligible infidelity through error correction, which could need millions or even more qubits and pose a challenge to the experimental technologies regarding scalability [2]. Error mitigation takes different resources, computing time, to suppress errors, being originally designed for the regime that error correction is lacking [3]. Considering the earliest applications of quantum computing, it is highly likely that they will be carried out under strict technology constraints, mainly on the qubit number. In this scenario, error correction can only attain a limited fidelity, and a practical approach taking advantage of the two error suppression methods is necessary [4, 5].

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Zero-noise extrapolation (ZNE) is one of the most practical error mitigation techniques, universally applicable to quantum algorithms that evaluate expectation values [6, 7]. The central idea behind ZNE is to amplify the noise in a quantum circuit by a controllable factor $r$, and then extrapolate the results back to $r=0$, thereby inferring the behavior of a noiseless circuit. In a recent experiment, ZNE demonstrated substantial error suppression on a superconducting system with more than a hundred qubits [8], making it the only error mitigation technique successfully applied at this scale to date. Given these promising results, we consider ZNE the leading candidate for mitigating errors in quantum error correction circuits. Specifically, we apply ZNE to reduce post-correction logical errors by amplifying noise on physical qubits.

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The implementation of ZNE on logical qubits faces two primary experimental challenges. First, it requires a quantum processor with high-fidelity gates and sufficient qubits, which is crucial for executing quantum error correction. Recent progress in qubit fabrication and control technologies have made superconducting qubits a promising platform for investigating quantum error correction and mitigation technologies [8, 9, 10, 11, 12, 13, 1]. In this work, we utilize two superconducting quantum processors to experimentally assess residual errors and costs in quantum error correction and mitigation, employing both the repetition code and surface code [14, 15, 16, 17]. Second, accurate error mitigation relies on measuring error rates per operation [3, 18]. While measuring logical error rates is feasible for small codes, it becomes increasingly time-consuming for larger codes due to the small logical error rates [19, 20]. Additionally, for high-encoding-rate quantum error correction codes, such as certain qLDPC codes, logical errors may involve multi-qubit correlations, making the measurement impractical [21, 22] (see Supplementary Section S2). To overcome this issue, we adopt a strategy of amplifying noise on physical qubits instead of logical qubits. By integrating error mitigation techniques with error correction, this study demonstrates a practical pathway to bridge the gap between the noisy intermediate-scale quantum (NISQ) era and the fault-tolerant quantum computing (FTQC) era, advancing the pursuit of practical quantum computing technologies.

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II Results

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We shall first justify the application of ZNE to quantum error correction circuits. The essential assumption made in ZNE is that the expected value of an observable is a function $\langle O\rangle(r)$ of the noise strength $r$, and this function can be fitted well by simple functions such as polynomials. This assumption holds in NISQ circuits, which has been illustrated in many theoretical works and experiments [6, 7, 3, 23, 24, 25, 12]. In this paper, one of the primary goals is to demonstrate that the assumption is also valid in quantum error correction circuits.

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Our first evidence is a theoretical result based on the stochastic error model: each operation in the circuit is either error-free or erroneous with a certain probability of $p$, and we increase the probability to $rp$ (with $r>1$) when amplifying the noise (Fig. 1). We apply this model to general quantum circuits with all the components necessary for quantum error correction, including mid-circuit state preparation and measurement, feedback and post-selection; these components are beyond NISQ circuits [26]. Even with these components, the expected value with errors is in the form $\langle O\rangle(r)=\langle O\rangle_{\rm ideal}+\sum_{k=1}^{N}a_{k}r^{k}$, where $N$ is the number of operations, and $a_{k}$ is the deviation caused by $k$ errors in the circuit (see Supplementary Section S1). This polynomial expression holds for all quantum circuits and suggests the use of a polynomial fitting function.

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Figure 1: Schematic diagram of ZNE on logical qubits. For an arbitrary quantum circuit with or without error correction, we can amplify the noise in either all physical operations or those causing most errors to mitigate corresponding imperfections. When using the circuit to measure the expectation of an observable $O$, the value changes with the noise strength $r$, depicted by a function $\langle O\rangle(r)$ for each case (lines). To implement a $K$th-order ZNE, we amplify the noise in the circuit and measure the observable expectation $\langle O\rangle$ at $K+1$ different noise strengths $r_{0},r_{1},\ldots,r_{K}$ ($K=1$ in the figure). We always take $r_{0}=1$ corresponding to the raw noise without amplification. With the expectation values $\langle O\rangle(r_{0}),\langle O\rangle(r_{1}),\ldots,\langle O\rangle(r_{K})$ (black solid circles), we fit the function and infer the noise-free result $\langle O\rangle_{\rm ideal}$ using a $(K+1)$-term polynomial (shadows, where the width indicates the variance in inference). We choose different polynomials depending on whether error correction is utilized and the code distance. The combination of error correction and ZNE results in a smaller bias and variance of observable expectations.

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We use different polynomial fitting functions in cases with and without error correction. Without error correction, the leading contribution of errors is $a_{1}$ due to only one error in the circuit. Therefore, we always include the linear term $a_{1}r$ when choosing a polynomial fitting function, then we introduce $r^{2},r^{3},\ldots$ terms sequentially for higher-order fitting; we use such polynomials in conventional ZNE. With error correction, the leading order is different. In a circuit, its capability of error correction is characterized by an effective code distance $d$: when the number of errors is smaller than $\lceil d/2\rceil$, we can always successfully detect and correct the errors. Because of this reason, the coefficients $a_{k}$ are all zero for $k=1,2,\ldots,\lceil d/2\rceil-1$, and the leading contribution becomes $a_{\lceil d/2\rceil}$; this coincides with numerical results on logical error rates of surface codes and bivariate bicycle codes [27, 22]. Therefore, with error correction, we choose a fitting function in the form $\langle O\rangle(r)=\langle O\rangle_{\rm em}+\sum_{k=\lceil d/2\rceil}^{\lceil d/2\rceil+K-1}a_{k}^{\prime}r^{k}$, which has $K$ non-constant terms starting with the $r^{\lceil d/2\rceil}$ term.

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Figure 2: ZNE on an example circuit with the feedback error correction. a, Circuit schematic. Each data qubit $Q_{j}$ is initialized into a superposition state parametrized by the rotation angle $\theta_{j}$. Either idling gate or one of the Pauli gates is injected as errors during the operational stage, effectively yielding 4 types of circuit instances. All qubits are measured simultaneously, returning bit strings for uncorrected data. Based on the bit strings of all circuit instances, post-selection on $Q_{3}$ and feedback $X$ gate are done numerically for corrected data. b, Uncorrected (left) and corrected (right) expectation values of $Z_{0}$ observable as a function of rotation angle $\theta_{0}$ and noise scaling factor $r$, where the unit error probability is chosen as $p=8.8\%$. Lines and markers are colored according to the measured values at $\theta_{0}=0$. c, ZNE for $\theta_{0}=0$ and $-0.4\pi$. Dashed lines are numerical simulation results using a model with gate and measurement errors. Empty symbols indicate the extrapolated results of ZNE using two data points at $r=1$ and $r=3$.

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We carry out experimental demonstrations on two superconducting quantum processors to certify that ZNE can be naturally integrated into the FTQC circuits. The processors used here, each of which contains a lattice of tens of frequency-tunable qubits featuring adjustable nearest-neighbor couplings, have performance similar to those dedicated to quantum error correction experiments in the literature [13, 12, 1]. The qubits selected for the experiments are highly coherent, with the median $T_{1}$ time being above $100$ $\mu$s (see parameters in Supplementary Table S1), and the controlled $\pi$-phase (CZ) gates between nearest-neighbor qubits have a median fidelity around 0.995. Since FTQC also relies heavily on measurement quality, we can differentiate between the $\ket{0}$ and $\ket{1}$ states of each qubit, achieving median readout fidelities of $0.995$ and $0.991$ for Processor I (with Purcell filters, $0.5$-$\mu$s measurement time) and Processor II (without Purcell filters, $2.5$-$\mu$s measurement time), respectively. This is accomplished by pumping the $\ket{1}$ state of each qubit to its next-higher level. Furthermore, even without the pumping technique which is a prerequisite for feedback operations in FTQC circuits, we can still achieve a median readout fidelity of $0.991$ on Processor I within 0.5 $\mu$s, as demonstrated in our repetition code experiment by allowing repetitive measurements on the syndrome qubits up to $M=4$ rounds (see next).

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As the first experimental demonstration, we show that ZNE works on an example circuit with a feedback $X$ control to eliminate the bit-flip error on $Q_{0}$ (Fig. 2a), where the nominal data qubits ($Q_{j}$ for $j=0$, 2, and 4) are each initialized into a superposition state given by $\ket{\psi_{j}}=\cos\dfrac{\theta_{j}}{2}\ket{0}-i\sin\dfrac{\theta_{j}}{2}\ket{1}$. The first 4 CNOT gates in the sequence diagram are used to encode the parity of the data qubits onto the syndrome qubits ($Q_{1}$ and $Q_{3}$), followed by operations for algorithmic purpose, and the next 4 CNOT gates serve to decode and identify the bit-flip type of errors that may occur during the operational stage. To implement ZNE, one needs to be able to controllably amplify the errors, which can be achieved using schemes such as pulse stretching [28, 25] or subcircuit repetition [29]. Here to simulate depolarizing errors occurring at a probability of $rp$ with $r$ being the scaling factor, we run $4^{3}$ types of circuit instances which correspond to all combinations of inserting one operation drawn from the list of $\left\{I,X,Y,Z\right\}$ at the operational stage for each of the 3 data qubit, based on which we construct a weighted list of circuit instances so that the insertion probabilities of $X$, $Y$, and $Z$ all equal to $rp/3$ for each data qubit (see Supplementary Section S4 for more details). Finally all qubits are measured in the $Z$ basis to yield a 5-bit binary string, $\mu_{0}\dots\mu_{4}$, for each circuit instance, and the no correction data are directly calculated using $\mu_{0}$s from all circuit instances. In the case of error correction, since a bit-flip error due to the insertion of $X$ or $Y$ on the pair of data qubits $Q_{j}$ and $Q_{j+2}$, $j\in\{0,2\}$, flips the state of $Q_{j+1}$, the 5-bit binary strings from all instances are selected only when $\mu_{3}=1$ to ensure no error on $Q_{2}$, following which $\mu_{0}$ is numerically reversed due to the feedback $X$ gate only if $\mu_{1}=-1$ to eliminate the bit-flip error on $Q_{0}$. The newly processed strings are then used to calculate the data with correction.

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For the case of no correction, Fig. 2b shows that the expectation values of $Z_{0}$ for $Q_{0}$, for different input states parametrized by $\theta_{0}$, all gradually approach zero as the noise strength $r$ increases. In comparison, the data using processed bit strings with error correction indicate that the impact of noise is reduced, resulting in a slower decline in $\langle Z_{0}\rangle$. Experimental results closely match numerical simulations of circuits with gate and measurement errors (Fig. 2c). Furthermore, when we use ZNE to extrapolate the values at $r=0$, the results show excellent agreement with numerical predictions, which demonstrates that ZNE effectively works on the circuit.

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In the above-mentioned example circuit, small errors occurring at the CNOT gates and measurement cannot be corrected, so that the post-mitigation residual error at $r=0$ is comparable to the case without error correction. Next, we resort to fault-tolerant circuits of repetition and surface codes, where the logical error rates can be suppressed to an arbitrarily low level by increasing the code distance once physical error rates are below the threshold. On fault-tolerant circuits, we find that the post-mitigation residual error is much smaller than the case without error correction.

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We implement repetition codes with distances $d=3,5,7$ using up to 13 qubits on Processor I, as shown in Fig. 3a. Repetition codes protect the encoded logical qubit from bit-flip errors and have been widely used as a prototype for demonstrating error correction across various quantum platforms, including ion traps [30, 31], nuclear magnetic resonance [32, 33], and superconducting qubits [34, 1]. Here, we adopt it for our first demonstration of error mitigation on fault-tolerant circuits.

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Figure 3: Performance of ZNE in the repetition code. a, Layout of the repetition code on Processor I, with the data (golden) and syndrome (blue) qubits depicted as circles. b, Schematic of the experimental circuit, where error injection and parity measurement are repeatedly performed for $M$ rounds, followed by the final round of error injection and data qubit measurement. c, Measured expectation values of $Z_{\rm L}$ with respect to the noise scaling factor $r$ in circuits with one round of mid-circuit parity measurements. We present the uncorrected results (averaged over all data qubits) exclusively for the distance-7 repetition code, as the results for different code distances are nearly identical (Supplementary Fig. S5). Dashed lines: numerical simulation results. d, Scatter plot showing the bias $\delta$ and sampling overhead $\eta$ for all possible choices of $r_{1},\ldots,r_{K}$ in ZNE. Generally, the ZNE results of $K=2$ (square) exhibit reduced bias yet introduce higher sampling overhead compared to $K=1$ (triangle). Dashed lines: biases without ZNE, i.e., $\delta_{0}=\left|\langle Z_{\rm L}\rangle_{\rm ideal}-\langle Z_{\rm L}\rangle\left(r=1\right)\right|$. e–f, Similar to panels c and d, but utilizing a multi-round repetition code with $d=7$ and performing ZNE with $K=1$. The lines in panel f serve as guides to illustrate the respective trends of ZNE performance.

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The circuit of a repetition code, schematically depicted in Fig. 3b, consists of $d$ data qubits and $d-1$ syndrome qubits arranged alternately in a linear chain. The data qubits are initialized in the state $\ket{0}$, preparing the logical qubit in the logical state $\ket{0_{\rm L}}$. Next, we apply error injections and perform parity-check measurements for $M$ successive rounds. The circuit terminates with an additional round of error injection and transversal measurement on data qubits. The transversal measurement facilitates a final round of parity checks and readout of the logical operator $Z_{\rm L}$. The parity checks are designed to detect all possible bit-flip errors, whether injected deliberately or introduced by computational operations such as gates, state preparation, and measurements. Each experimental shot produces a bit string of length $M(d-1)+d$, recording the measurement outcomes. This bit string is then processed by a minimum-weight perfect matching (MWPM) decoder [35, 36], which outputs the correction gates. These corrections ensure faithful reconstruction of the logical state, provided that the number of bit-flip errors does not exceed $\lceil d/2\rceil-1$; therefore, the circuit is fault-tolerant with respect to bit-flip errors.

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We evaluate the performance of error suppression methods using the expectation value of the logical operator $Z_{\rm L}$. In an ideal noise-free circuit, the expectation value is $\langle Z_{\rm L}\rangle_{\rm ideal}=1$; the presence of noise reduces this value. For illustrative purpose, we experimentally inject Pauli errors during the operational stage with the unit probability set at $p=3.6\%$, as done in the previous example. Figure 3c shows the experimental results for circuits with one round of parity-check measurements ($M=1$): the expectation value decreases gradually with increasing noise strength, while error correction slows the rate of decline. As the code distance $d$ increases, the rate of decline approaches zero asymptotically, indicating a below-threshold error regime.

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To further suppress errors beyond error correction, we apply ZNE to the results. Specifically, we select $K+1$ data points corresponding to noise strengths $r=r_{0},r_{1},\cdots,r_{K}$ and perform polynomial extrapolation to obtain the error-mitigated expectation value of the logical operator, denoted as $\langle Z_{\rm L}\rangle_{\rm em}$. To evaluate the performance of ZNE, we define two metrics: the bias $\delta$ and the sampling overhead $\eta$. The bias $\delta$ quantifies the deviation of the error-mitigated value from the ideal expectation and is expressed as

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$$\delta=\left|\langle Z_{\rm L}\rangle_{\rm em}-\langle Z_{\rm L}\rangle_{\rm ideal}\right|.$$ (1)

The sampling overhead $\eta$ measures the relative increase in sampling cost required to achieve the same variance for the error-mitigated value as for the uncorrected value, and it is defined as

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$$\eta=\dfrac{{\rm Var}\left[\langle Z_{\rm L}\rangle_{\rm em}\right]}{{\rm Var}\left[\langle Z_{\rm L}\rangle\left(r_{0}\right)\right]}.$$ (2)

Unless otherwise specified, we take $r_{0}=1$ in what follows and iterate over all other data points for $r_{1},\cdots,r_{K}$.

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The $\delta$-$\eta$ scatter plots in Fig. 3d visualize that ZNE consistently provides more accurate estimations compared to the uncorrected value at $r_{0}=1$ (indicated by dashed lines) across all cases. The plots also highlight a trade-off between the bias $\delta$ and sampling overhead $\eta$: while ZNE reduces bias, it increases the sampling overhead. If the noise-boosted data points at $r_{1},\cdots,r_{K}$ are chosen closer to $r_{0}$ or if a higher-order extrapolation (larger $K$) is used, the bias generally decreases, but the sampling overhead tends to grow. Figures 3c-d further highlight the advantage of combining ZNE with error correction. When error correction is applied, the $\delta$-$\eta$ scatter points progressively migrate toward the lower-left corner as the code distance $d$ increases, indicating simultaneous improvements in precision and efficiency. Notably, for $d=7$, the residual error $\delta$ is reduced to approximately $1\times 10^{-4}$, with a modest sampling overhead of just $5$.

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It is important to note that error mitigation is scalable on error correction circuits as the code distance and circuit complexity increase [5]. A fundamental limitation of error mitigation methods is that they become inefficient when the product of the error rate per gate and the number of gates becomes large. This limitation is well-studied in probabilistic error cancellation, a bias-free method, where variance increases exponentially with the gate number [37, 38, 39]. In contrast, the polynomial-function ZNE has a bias that grows with the gate number [7]. Although these issues also arise in error mitigation applied to error correction circuits, the key factors become the logical error rate and the number of logical gates. Therefore, as long as the logical error rate remains sufficiently low — that is, with a sufficiently large code distance — error mitigation can be applied to circuits of arbitrary gate complexity. For instance, using the surface code with a physical error rate of $1\permil$ per gate and a code distance of eleven, we can achieve a logical error rate of approximately $2\times 10^{-10}$ [27]. This allows a circuit with $5\times 10^{7}$ logical operations to run at one logical error in one hundred circuit shots. In this case, our protocol can reduce the logical error by a factor of about $0.025$ with an overhead cost of $\eta\simeq 136$ due to our estimation (see Supplementary Section S7). Moreover, our experiments show that as the code distance and parity-check rounds increase, the performance of ZNE remains nearly unchanged; notice that multi-round parity checks are necessary in practical fault-tolerant quantum computing. This insight can be demonstrated in two complementary ways. First, when the error rate per parity-check round is fixed, increasing the number of parity-check rounds results in a similar relative bias and sampling overhead for ZNE, despite the growth in unmitigated bias (see Supplementary Fig. S6). Second, for a fixed total error rate in all rounds, partitioning the circuit and employing multi-round QEC significantly improves both the unmitigated and mitigated results (Fig. 3e–f). Remarkably, these enhancements are achieved while the sampling overhead remains nearly unchanged.

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Figure 4: Correction and mitigation of both $X$- and $Z$-type errors in a distance-3 surface code. a, Illustration of the experimental circuit implemented on Processor II. The qubit layout (left) comprises 9 data qubits (yellow), 4 $Z$-type syndrome qubits (blue), and 4 $X$-type syndrome qubits (violet). The circuit consists of two error injection layers, interleaved with multiple layers of Hadamard gates (H) and CNOT gates (black) designed to perform parity check, and terminates with simultaneous readout on all data and syndrome qubits. The system is initialized in an arbitrary logical state of the surface code, with detailed protocol provided in Supplementary Section S5. b, Logical states on the $X_{\rm L}$-$Z_{\rm L}$ plane of the Bloch sphere, constructed from the measured expectation values of $X_{\rm L}$ and $Z_{\rm L}$. The first plot shows various logical states measured without error injection, while the subsequent plots show the effect of different noisy scaling factors $r$ for three initial states: $|0_{\rm L}\rangle$, $|+_{\rm L}\rangle$ and $|\psi_{\rm L}\rangle=\cos\frac{\pi}{6}|0_{\rm L}\rangle+\sin\frac{\pi}{6}|1_{\rm L}\rangle$. c, Expectation values of the $Z_{\mathrm{L}}$ observable for the logical state $|\psi_{\mathrm{L}}\rangle$ as a function of noise scaling factor $r$, including the raw data (blue points), corrected data (crimson points), and numerical simulation results (dashed lines). d, Scatter plot of the bias $\delta$ and sampling overhead $\eta$. The bias $\delta$ derived from the corrected data approaches the limit set by the imperfect initial state, which is close to $5\times 10^{-2}$.

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As a final experiment, we extend our investigation to the rotated surface code, a quantum error correction code capable of correcting both bit-flip and phase-flip errors. We implement the distance-3 rotated surface code on our Processor II, as illustrated in Fig. 4a. The encoded logical qubit is defined by two anti-commuting logical operators, $X_{\rm L}=X_{D1}X_{D4}X_{D7}$ and $Z_{\rm L}=Z_{D3}Z_{D4}Z_{D5}$, and the system can be initialized by preparing the logical states using digital quantum circuits that consist of single- and two-qubit gates [40, 13].

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We demonstrate the effectiveness of ZNE following the sequence diagram shown in Fig. 4a, with three representative initial states: $\ket{0_{\rm L}}$, $\ket{+_{\rm L}}$, and $\ket{\psi_{\rm L}}=\cos\frac{\pi}{6}\ket{0_{\rm L}}+\sin\frac{\pi}{6}\ket{1_{\rm L}}$ (Fig. 4b). In the absence of error injections, the initial states reconstructed from the corrected expectation values of the $Z_{\rm L}$ and $X_{\rm L}$ observables locate significantly closer to the surface of the Bloch sphere compared to those reconstructed from the uncorrected values (Fig. 4b). This demonstrates reductions in both bit-flip and phase-flip errors that arise during the initial state preparation and parity measurement processes. We present numerical simulations based on the single-qubit depolarizing model, where the depolarizing rate is calibrated by matching the fidelity of the prepared logical state, $\ket{0_{\rm L}}$. As shown in Figs. 4b-c, this noise model agrees well with the experimental data, regardless of the initial states. Detailed results for both uncorrected and corrected expectation values of the $Z_{\rm L}$ observable, with the initial state set to $\ket{\psi_{\rm L}}$, are presented in Fig. 4c; see Supplementary Fig. S8 for more experimental results. To implement ZNE, we insert random Pauli gates on data qubits before and after the parity-check measurements to amplify the noise. In surface codes, quantum computing are driven by the parity-check measurements applied on a lattice deforming with time in protocols such as braiding transformation [15] and lattice surgery [41]. ZNE can be applied to such circuits through the same noise amplification strategy as taken in our experiment. By incorporating ZNE, the residual errors in $\langle Z_{\rm L}\rangle$ and $\langle X_{\rm L}\rangle$ are further reduced beyond error correction (see Fig. 4d and Supplementary Fig. S8).

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III Discussion

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Our results demonstrate for the first time the application of quantum error mitigation on error correction circuits, effectively minimizing the impact of error correction failures. The specific method that we choose is ZNE: we amplify noise on physical qubits and utilize a selected polynomial extrapolation function, thereby adapting the method to be compatible with fault-tolerant quantum circuits. Amplifying physical error rates, a well-established and experimentally validated technique on NISQ circuits, ensures the feasibility of our approach. Moreover, the success of error mitigation methods such as ZNE and probabilistic error cancellation fundamentally depends on precise noise modeling. Our experimental results exhibit strong consistency with numerical simulations of noise models from calibration, offering a robust foundation for further performance optimization. As the main result, our approach achieves a reduction in error-induced bias, outperforming both standalone error correction and error mitigation. This bias reduction illustrates the potential to achieve reliable quantum computing on hardware that only permits limited error correction capabilities, marking a pivotal step toward large-scale quantum computing on noisy devices.

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Acknowledgements

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The device was fabricated at the Micro-Nano Fabrication Center of Zhejiang University. We acknowledge the support from the National Natural Science Foundation of China (Grant Nos. 92365301, 92065204, 12404574, 12274368, 12274367, 12174342, 12322414, 12404570, U20A2076, 12225507 and 12088101), the Innovation Program for Quantum Science and Technology (Grant No. 2021ZD0300200), the Zhejiang Provincial Natural Science Foundation of China (Grant Nos. LR24A040002 and LDQ23A040001), the National Key Research and Development Program of China (Grant No. 2023YFB4502600), and the NSAF (Grant No. U1930403).

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Author contributions

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H.X. and Y.L. proposed the ideas and conducted the theoretical analysis; A.Z., Y.G. and J.Y. carried out the experiments and analyzed the experimental data under the supervision of P.Z. and H.W.; H.L. and J.C. fabricated the device, supervised by H.W.; All authors contributed to the experimental setup, analysis of data, discussions of the results and writing of the manuscript.

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S1 Zero-noise extrapolation formulas

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First, we introduce some notations and briefly review NISQ and FTQC circuits. Here, FTQC circuits refer to quantum circuits with mid-circuit state preparation and measurement, feedback and post-selection. Then, we show how to express an FTQC circuit with an example. Finally, we generalize the expression to arbitrary FTQC circuits. With the expression, we derive the formula for ZNE.

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Notations. We use $X_{i},Y_{i},Z_{i}$ to denote Pauli operators on qubit-$i$, and we use $\openone$ to denote the identity operator. Given an operator $V$, we use $[V]$ to denote a completely positive map $[V]\bullet=V\bullet V^{\dagger}$.

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We use three types of primitive operations to implement quantum computing: gate, state preparation and measurement. We can denote them with completely positive maps. An ideal gate is denoted by $[U]$, where $U$ is a unitary operator. An ideal state preparation is denoted by $\mathcal{A}_{P,i}=[(\openone+P_{i})/2]+[P^{\prime}_{i}][(\openone-P_{i})/2]$, which prepares qubit-$i$ in the eigenstate of $P=X,Y,Z$ with the eigenvalue $+1$. Here, $P^{\prime}$ is an arbitrary Pauli operator different from $P$, and $(\openone\pm P_{i})/2$ is the projection operator onto eigenstates of $P_{i}$ with the eigenvalue $\pm 1$. An ideal measurement is denoted by $\mathcal{B}_{P,i}(\mu)=[(\openone+\mu P_{i})/2]$, which is a measurement on qubit-$i$ in the $P=X,Y,Z$ basis. Here, $\mu=\pm 1$ is the measurement outcome. The maps $[U]$ and $\mathcal{A}_{P,i}$ are trace-preserving; $\mathcal{B}_{P,i}(\mu)$ is not, but $\mathcal{B}_{P,i}(+1)+\mathcal{B}_{P,i,}(-1)$ is trace-preserving.

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When errors occur stochastically in an operation, the actual operation is in the form $\mathcal{M}=(1-p)\mathcal{M}^{I}+p\mathcal{M}^{E}$, where $\mathcal{M}^{I}=[U],\mathcal{A}_{P,i},\mathcal{B}_{P,i}(\mu)$ is the ideal operation, $p$ is the probability of errors, and $\mathcal{M}^{E}$ is a completely positive map denoting the operation with errors.

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Now, we take the Pauli error model as an example, which is a practical mode of errors in quantum computing. In the Pauli error model, the process generating Pauli errors is a map in the form $\mathcal{N}=(1-p)[\openone]+p\mathcal{E}$, where $p$ is the error probability, and $\mathcal{E}$ is a trace-preserving completely positive map denoting errors. If we neglect crosstalk, errors only happen on the qubit subset that an operation acts on, called the support. For a single-qubit operation on qubit-$i$, the noise map is $\mathcal{N}_{1}=(1-p)[\openone]+(p_{X}[X_{i}]+p_{Y}[Y_{i}]+p_{Z}[Z_{i}])$, where $P_{X},P_{Y},P_{Z}$ are probabilities of corresponding Pauli errors, and $p=p_{X}+p_{Y}+p_{Z}$ is the total error probability. Similarly, for a two-qubit gate on qubits $i$ and $j$, the noise map is $\mathcal{N}_{2}=(1-p)[\openone]+\sum_{P=X,Y,Z}(p_{PI}[P_{i}]+p_{IP}[P_{j}])+\sum_{P,P^{\prime}=X,Y,Z}p_{PP^{\prime}}[P_{i}P^{\prime}_{j}]$, where $p=\sum_{P=X,Y,Z}(p_{PI}+p_{IP})+\sum_{P,P^{\prime}=X,Y,Z}p_{PP^{\prime}}$. To include crosstalk, the general noise map is in the form $\mathcal{N}=(1-p)[\openone]+\sum_{P}p_{P}[P]$, where $P$ is a Pauli operator, $p_{P}$ is the probability of the Pauli error $P$, and $p=\sum_{P}p_{P}$. Here, the Pauli operator $P$ is either a single-qubit Pauli operator or an arbitrary product of single-qubit operators, and it may act on qubits out of operation’s support. In this general Pauli-error noise map, the erroneous map is $\mathcal{E}=p^{-1}(\sum_{P}p_{P}[P])$.

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In the Pauli error model, the actual operation of a gate is in the form $\mathcal{M}=\mathcal{N}\mathcal{M}^{I}$, where $\mathcal{M}^{I}=[U]$ is the ideal gate. For a state preparation operation, the actual operation is also in the form $\mathcal{M}=\mathcal{N}\mathcal{M}^{I}$, where $\mathcal{M}^{I}=\mathcal{A}_{P,i}$ is the ideal state preparation. For a measurement, the actual operation is in the form $\mathcal{M}(\mu)=\mathcal{M}^{I}(\mu)\mathcal{N}$ (the noise occur before the ideal operation this time), where $\mathcal{M}^{I}(\mu)=\mathcal{B}_{P,i}(\mu)$ is the ideal measurement. Substituting the expression of the noise map $\mathcal{N}$, we can find that actual operations are in the form $\mathcal{M}=(1-p)\mathcal{M}^{I}+p\mathcal{M}^{E}$, where $\mathcal{M}^{E}=\mathcal{E}\mathcal{M}^{I}$ for gates and state preparation, and $\mathcal{M}^{E}=\mathcal{M}^{I}\mathcal{E}$ for measurement.

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NISQ circuits and FTQC circuits. In an NISQ circuit, qubits are prepared at the beginning and measured at the end of the circuit, and gates are applied between the state preparation and measurement. Such circuits are insufficient for the usual protocols of FTQC.

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In error correction, we usually detect errors using measurements. Typically, we repeatedly measure a set of carefully chosen Pauli operators, stabilizer operators of the error correction code. Then, we send the measurement outcomes to a classical algorithm called a decoder. With the algorithm, we compute a set of Pauli gates. By applying the Pauli gates, we can correct errors on qubits. Therefore, the error correction is a typical feedback process.

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We need post-selection when the magic state is used in quantum computing. Because of the error correction code, we cannot directly apply all necessary gates on logical qubits. The magic state represents a promising protocol to complete the universal gate set. In the magic-state protocol, we prepare some resource states on logical qubits and then improve their fidelities in certain distillation circuits. With the resource states distilled, we can use them to implement gates that cannot be implemented directly. The distillation circuits improve the fidelity through post-selection: the resource state is kept or discarded depending on measurements in the distillation circuit; if discarded, we need to re-prepare the state and try distillation for another round. We remark that the preparation, distillation and utilization of magic states also require feedback operations.

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Figure S$1$: An example circuit with feedback and post-selection operations. The circuit succeeds when $\mu_{4}=+1$.

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An example FTQC circuit. To illustrate the expression of FTQC circuits using completely positive maps, we take the circuit in Fig. S$1$ as an example, which includes feedback and post-selection operations. There are three state preparation operations and three measurements in the circuit. Depending on the measurement outcome $\mu_{7}$, the number of gates is either two or three.

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Using completely positive maps, we can express the ideal circuit in the following form

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$$\mathcal{M}^{I}(\mu_{4},\mu_{7},\mu_{9})$$ (S1)

$$= \delta_{\mu_{4},+1}\mathcal{M}_{9}^{I}(\mu_{9})\mathcal{M}_{8}^{I}(\mu_{7})\mathcal{M}_{7}^{I}(\mu_{7})\mathcal{M}_{6}^{I}$$

$$\times\mathcal{M}_{5}^{I}\mathcal{M}_{4}^{I}(\mu_{4})\mathcal{M}_{3}^{I}\mathcal{M}_{2}^{I}\mathcal{M}_{1}^{I}.$$

Here, $\mathcal{M}_{1}^{I}=\mathcal{A}_{Z,1}$ and $\mathcal{M}_{2}^{I}=\mathcal{M}_{5}^{I}=\mathcal{A}_{Z,2}$ are state preparation operations, $\mathcal{M}_{3}^{I}=\mathcal{M}_{6}^{I}=[U]$ are controlled-NOT gates, $\mathcal{M}_{4}^{I}(\mu_{4})=\mathcal{B}_{Z,2}(\mu_{4})$, $\mathcal{M}_{7}^{I}(\mu_{7})=\mathcal{B}_{Z,2}(\mu_{7})$ and $\mathcal{M}_{9}^{I}(\mu_{9})=\mathcal{B}_{Z,1}(\mu_{9})$ are measurements, $\mathcal{M}_{8}^{I}(\mu_{7})=\delta_{\mu_{7},+1}[\openone]+\delta_{\mu_{7},-1}[X_{1}]$ is the measurement-dependent gate in the feedback operation, and $\delta_{\mu_{4},+1}$ denotes the post-selection operation.

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With noise, the map of the circuit becomes

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$$\mathcal{M}(\mu_{4},\mu_{7},\mu_{9})$$ (S2)

$$= \delta_{\mu_{4},+1}\mathcal{M}_{9}(\mu_{9})\mathcal{M}_{8}(\mu_{7})\mathcal{M}_{7}(\mu_{7})\mathcal{M}_{6}$$

$$\times\mathcal{M}_{5}\mathcal{M}_{4}(\mu_{4})\mathcal{M}_{3}\mathcal{M}_{2}\mathcal{M}_{1},$$

where operations are in the from $\mathcal{M}_{j}=(1-p_{j})\mathcal{M}_{j}^{I}+p_{j}\mathcal{M}_{j}^{E}$. Because the eighth operation is measurement-dependent, it has a measurement-dependent error probability $p_{8}(\mu_{7})$ and erroneous operation $\mathcal{M}_{8}^{E}(\mu_{7})$: $p_{8}(+1)$ and $\mathcal{M}_{8}^{E}(+1)$ [$p_{8}(-1)$ and $\mathcal{M}_{8}^{E}(-1)$] are the error probability and erroneous operation, respectively, of the gate $\openone$ ($X_{1}$).

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General FTQC circuits. For a general FTQC circuit, we can express the ideal circuit consisting of $N$ operations in the form

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$$\mathcal{M}^{I}(\tilde{\mu}_{N}) = g(\tilde{\mu}_{N})\mathcal{M}_{N}^{I}(\tilde{\mu}_{N-1},\mu_{N})\cdots$$ (S3)

$$\times\mathcal{M}_{j}^{I}(\tilde{\mu}_{j-1},\mu_{j})\cdots\mathcal{M}_{2}^{I}(\tilde{\mu}_{1},\mu_{2})\mathcal{M}_{1}^{I}(\mu_{1}).~{}~{}$$

Here, $\mathcal{M}_{j}^{I}$ is the completely positive map denoting the $j$th operations. We use $\mu_{j}$ to represent the measurement outcome of the $j$th operation: $\mu_{j}=\pm 1$ ($\mu_{j}=0$) if the $j$th operation is (not) a measurement. If the $j$th operation is a measurement, the map $\mathcal{M}_{j}^{I}$ is a function of the measurement outcome $\mu_{j}$; even if the $j$th operation is not a measurement, we still can express it as a function of $\mu_{j}$ because $\mu_{j}$ takes only one value anyway. We use $\tilde{\mu}_{j}$ to represent a tuple of measurement outcomes from the first to $j$th operations, and we can define it formally with the recursion formula $\tilde{\mu}_{j}=(\tilde{\mu}_{j-1},\mu_{j})$ and the initial value $\tilde{\mu}_{0}=()$. The $j$th operation may depend on measurement outcomes of previous operations since the feedback. Therefore, the map $\mathcal{M}_{j}^{I}$ is also a function of $\tilde{\mu}_{j-1}$: If the operation is not a feedback operation, the dependence is trivial, i.e. $\mathcal{M}_{j}^{I}(\tilde{\mu}_{j-1},\mu_{j})=\mathcal{M}_{j}^{I}(\mu_{j})$, such as operations with $j\neq 8$ in the example circuit; the eighth operation is the only one with a non-trivial dependence on previous measurement outcomes. The function $g$ describes the post-selection,

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$$g(\tilde{\mu}_{N}) = \begin{cases}1,&\tilde{\mu}_{N}\in S;\\ 0,&\tilde{\mu}_{N}\notin S,\end{cases}$$ (S4)

where $S$ denotes the set of measurement outcomes indicating success.

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For the noisy circuit, its map is in the form

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$$\mathcal{M}(\tilde{\mu}_{N}) = g(\tilde{\mu}_{N})\mathcal{M}_{N}(\tilde{\mu}_{N-1},\mu_{N})\cdots$$ (S5)

$$\times\mathcal{M}_{j}(\tilde{\mu}_{j-1},\mu_{j})\cdots\mathcal{M}_{2}(\tilde{\mu}_{1},\mu_{2})\mathcal{M}_{1}(\mu_{1}),~{}~{}$$

where operations are in the from

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$$\mathcal{M}_{j}(\tilde{\mu}_{j-1},\mu_{j}) = [1-p_{j}(\tilde{\mu}_{j-1})]\mathcal{M}_{j}^{I}(\tilde{\mu}_{j-1},\mu_{j})$$ (S6)

$$+p_{j}(\tilde{\mu}_{j-1})\mathcal{M}_{j}^{E}(\tilde{\mu}_{j-1},\mu_{j}).$$

If the $j$th operation is a feedback operation that depends on previous measurement outcomes, such as the eighth operation in the example circuit, error probability $p_{j}$ depends on $\tilde{\mu}_{j-1}$; otherwise, $p_{j}$ is a constant function; the erroneous operation $\mathcal{M}_{j}^{E}$ is similar.

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The expression in Eq. (S5) illustrates the temporal order of operations that an operation can only depend on measurement outcomes in previous operations. This temporal order is unimportant for error mitigation, and if neglect, we have a simplified expression of a noisy circuit: We use $\bm{\mu}=\tilde{\mu}_{N}$ to denote all measurement outcomes in the circuit, then

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$$\mathcal{M}(\bm{\mu}) = g(\bm{\mu})\mathcal{M}_{N}(\bm{\mu})\cdots\mathcal{M}_{j}(\bm{\mu})\cdots\mathcal{M}_{2}(\bm{\mu})\mathcal{M}_{1}(\bm{\mu}),~{}~{}~{}$$ (S7)

where operations are in the from

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$$\mathcal{M}_{j}(\bm{\mu}) = [1-p_{j}(\bm{\mu})]\mathcal{M}_{j}^{I}(\bm{\mu})+p_{j}(\bm{\mu})\mathcal{M}_{j}^{E}(\bm{\mu}).$$ (S8)

Expansion formula of the observable with errors. With a circuit, we can evaluate observables that are functions of measurement outcomes, $f(\bm{\mu})$. For example, if we want to evaluate the observable $Z_{1}$ in the example circuit, we take $f(\bm{\mu})=\mu_{9}$. In the case of error correction, this function takes into account the last-round error correction on the measurement outcomes.

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The ideal expected value of the observable is

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$$\langle O\rangle_{\rm ideal} = \sum_{\bm{\mu}}f(\bm{\mu})\operatorname{Tr}\left[\mathcal{M}^{I}(\bm{\mu})\rho\right],$$ (S9)

where $\rho$ is the initial state, and $\operatorname{Tr}\left[\mathcal{M}^{I}(\bm{\mu})\rho\right]$ is the probability of the measurement outcome $\bm{\mu}$ in the ideal circuit.

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Because of the post-selection, the distribution may not be normalized in general. The expected value in the normalized distribution is

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$$\langle O\rangle_{\rm ideal} = \frac{\langle O\rangle_{\rm ideal}}{\langle\openone\rangle_{\rm ideal}},$$ (S10)

and we have the expression of $\langle\openone\rangle_{\rm ideal}$ by substituting $f=1$ into Eq. (S9). In the following, we focus on $\langle O\rangle$, and the result can be applied to $\langle\openone\rangle$.

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With a noisy circuit, the expected value of the observable is

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$$\langle O\rangle = \sum_{\bm{\mu}}f(\bm{\mu})\operatorname{Tr}\left[\mathcal{M}(\bm{\mu})\rho\right],$$ (S11)

where $\operatorname{Tr}\left[\mathcal{M}(\bm{\mu})\rho\right]$ is the probability of the measurement outcome $\bm{\mu}$ in the noisy circuit. To explicitly express the observable as a function of error probabilities, we rewrite each actual operation in the circuit as

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$$\mathcal{M}_{j} = \mathcal{M}_{j}^{(0)}+p_{j}\mathcal{M}_{j}^{(1)}=\sum_{b_{j}=0,1}p_{j}^{b_{j}}\mathcal{M}_{j}^{(b_{j})},$$ (S12)

where $\mathcal{M}_{j}^{(0)}=\mathcal{M}_{j}^{I}$ is the ideal operation, and

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$$\mathcal{M}_{j}^{(1)} = \mathcal{M}_{j}^{E}-\mathcal{M}_{j}^{I}$$ (S13)

is the deviation from the ideal operation. Substituting this expression of $\mathcal{M}_{j}$, we have

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$$\langle O\rangle = \sum_{\bm{\mu}}\sum_{b_{1},b_{2},\ldots,b_{N}=0,1}\left[\prod_{j=1}^{N}p_{j}^{b_{j}}(\bm{\mu})\right]$$ (S14)

$$\times a(b_{1},b_{2},\ldots,b_{N};\bm{\mu}),$$

where

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$$a(b_{1},b_{2},\ldots,b_{N};\bm{\mu})$$ (S15)

$$= f(\bm{\mu})g(\bm{\mu})\operatorname{Tr}\left[\mathcal{M}_{N}^{(b_{N})}(\bm{\mu})\cdots\mathcal{M}_{1}^{(b_{1})}(\bm{\mu})\rho\right].$$

Eventually, we can rewrite the expression as

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$$\langle O\rangle=\langle O\rangle_{\rm ideal}+\sum_{k=1}^{N}a_{k},$$ (S16)

where

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$$a_{k} = \sum_{\bm{\mu}}\sum_{j_{1}<j_{2}<\cdots<j_{k}}$$ (S17)

$$p_{j_{1}}(\bm{\mu})p_{j_{2}}(\bm{\mu})\cdots p_{j_{k}}(\bm{\mu})a(j_{1},j_{2},\ldots,j_{k};\bm{\mu}),$$

and

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$$a(j_{1},j_{2},\ldots,j_{k})$$ (S18)

$$= a(b_{1},b_{2},\ldots,b_{N})|_{b_{j}=1\text{ iff }j\in\{j_{1},j_{2},\ldots,j_{N}\}}.$$

Here, we have used that $\sum_{\bm{\mu}}a(0,0,\ldots,0;\bm{\mu})=\langle O\rangle_{\rm ideal}$.

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In ZNE, we mitigate errors by boosting the error probability. If we boost errors in each operation with the same factor of $r$ (i.e. $p_{j}\rightarrow rp_{j}$ for all $j$), the computing result becomes a polynomial function of $r$, $\langle O\rangle(r)=\langle O\rangle_{\rm ideal}+\sum_{k=1}^{N}a_{k}r^{k}$. This formula holds for both NISQ and FTQC circuits.

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S2 Correlations in logical errors of qLDPC codes

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Unlike the surface code, many qLDPC codes encode a large number of logical qubits in a single block of physical qubits. Errors in these logical qubits could be significantly correlated, tending to occur simultaneously on multiple logical qubits, as illustrated in Fig. S$2$. In the $[[72,12,6]]$ code [22], the probability that $4$ to $7$ logical qubits fail simultaneously is higher than other cases, indicating significant correlations. For such correlated errors, measuring their error rates is extremely challenging. Even assuming Pauli errors, obtaining a model of correlated errors requires measuring $4^{k}-1$ error rates, where $k$ is the number of logical qubits in a block.

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Figure S$2$: Numerical results of multi-qubit correlations in a bivariate bicycle code. We take the $[[72,12,6]]$ code in the bivariate bicycle family and a physical error rate of $p=0.002$ per operation as an example. Using Monte Carlo simulation, we evaluate the number of logical qubits $N_{bit}$ that are affected by logical errors simultaneously in each trial. The probability of each qubit number is ploted.

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S3 Device performance

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Two quantum processors, named Processor I and Processor II, are used in this work for experiments of repetition code and surface code, respectively. Processor I consists of a $6\times 6$ transmon qubit array, from which 13 qubits are utilized in the experiment. Processor II has the same architecture as Processor I, but with a qubit array of $11\times 11$. In the distance-3 surface code experiments, 17 qubits are used. The median $T_{1}$ and $T_{2}^{\rm SE}$ times for the qubits used in Processor I (Processor II) are $124$ $\mu$s and $11$ $\mu$s ($128$ $\mu$s and $16$ $\mu$s), respectively. In this work, we adopt two different readout schemes: (1) conventional measurement for multi-round experiments; (2) using state $\ket{2}$ to reduce measurement errors for one-round experiments. The gate and measurement errors of two processors are visualized in Fig. S$3$.

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Figure S$3$: Cumulative distributions of operation error rates measured on Processor I and Processor II. Red: Pauli errors for simultaneous single-qubit gates. Black: Pauli errors for simultaneous CZ gates. Blue: average identification errors for measurement where additional microwave pulses are applied to excite each qubit from the state $\ket{1}$ to the state $\ket{2}$ before performing the dispersive readout (Method I). Green: average identification errors for conventional measurement (Method II). Dashed lines: median values.

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Table S1: Qubit parameters, coherence properties and gate performance for Processor I and Processor II.

		Processor I			Processor II
Parameter	Median	Mean	Stdev.	Median	Mean	Stdev.
Qubit idle frequency, $\omega_{\rm idle}/2\pi$ (GHz)	4.000	3.962	0.128	4.123	4.120	0.131
Qubit anharmonicity, $\alpha/2\pi$ (MHz)	-197.3	-197.1	1.6	-214.6	-214.7	2.3
Readout frequency, $\omega_{\rm r}/2\pi$ (GHz)	6.316	6.299	0.095	6.416	6.416	0.086
Energy relaxation time, $T_{1}$ ($\mu$s)	124.36	111.82	33.22	127.89	132.44	24.32
Spin-echo dephasing time, $T_{2}^{\rm SE}$ ($\mu$s)	11.34	11.72	2.35	15.55	18.18	7.81
Readout error $e_{\rm r}$ using Method I / Method II (%)	0.47 / 0.87	0.52 / 0.82	0.16 / 0.18	0.87 / -	0.94 / -	0.30 / -
1Q XEB Pauli error, $e_{1}$ (%)	0.085	0.079	0.021	0.055	0.052	0.019
2Q XEB Pauli error, $e_{2}$ (%)	0.56	0.56	0.14	0.37	0.40	0.17

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S4 Generating circuit instances and calculating the expectations

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To controllably amplify existing errors, we choose to insert an operation drawn from the list of $\{I,X,Y,Z\}$ during the operational stage for each qubit. The most intuitive way to generate adequate circuit instances for the estimation of $\langle Z_{\rm L}\rangle$ (or $\langle X_{\rm L}\rangle$) — randomly selecting the operation with assigned probabilities for each circuit instance — can be inefficient. For example, in the scenario of using a distance-3 (7) repetition code, around $80\%$ ($60\%$) of circuit instances are devoid of any error injection when $p=3.6\%$ and $r=1$. In addition, circuit instances with the presence of multiple injected errors, which can potentially lead to the failure of quantum error correction and contribute to the infidelity of estimation, are unlikely to be chosen. Alternatively, we can iterate over all possible circuit instances and numerically construct the desired circuit list by calculating the weighted average. For example, in the experiment related to Fig. 2 of the main text, all $4^{3}$ circuit instances were experimentally implemented for each value of $r$, and the resulting data were processed to estimate the expectations of $Z_{0}$. However, in repetition and surface codes, the large number of circuit instances makes full implementation impractical. To address this challenge, we employ a method to select the most likely circuit instances as follows.

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First, we determine the total number of circuit instances, which scales proportionally with the code distance to ensure more accurate estimations (see Table S2). Second, we consider the case of injecting $k$ errors into the circuit and calculate the required number of circuit instances based on the error-injection probability $rp$. Circuit instances are then randomly selected without replacement until the desired number is reached or all possible instances have been selected. The number of remaining circuit instances to be determined is updated accordingly. Finally, the second and third steps are iteratively repeated, starting with $k=0$ and continuing until the total number is reached.

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The above procedure assumes perfect operations and measurements. In practice, however, when the number of possible circuit instances for injecting $k$ errors is small — such as in the case of $k=0$ — the statistical error due to finite measurement shots can proportionately impact the overall estimation accuracy, scaling with the assigned weight. To reduce this effect, we introduce a key modification to the procedure: the circuit number for each $k$ is required to exceed a predefined threshold, such as $1\%$ of the total circuit number. Equivalently, this modification increases the number of measurement shots, thereby reducing statistical errors and improving the accuracy of the estimation.

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Table S2: Number of circuit instances used to estimate the expectation values.

	1-round	2-round	3-round	4-round
distance-3 repetition code	$1000$	$1000$	$1500$	$2000$
distance-5 repetition code	$3500$	$5000$	$5000$	$6000$
distance-7 repetition code	$6000$	$6000$	$6000$	$7000$
distance-3 surface code	$4000$	-	-	-

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We estimate the expectation values, such as $\langle Z_{\rm L}\rangle$ and $\langle X_{\rm L}\rangle$, by averaging measured results across all generated circuit instances with the respective weights. Specifically, we denote $O_{k,c,s}$ as the corresponding outcome with $k$ errors are injected into the circuit, with $c$ representing the circuit index and $s$ the index of measurement shot. The expectation value is then calculated as

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$$\overline{O}=\frac{1}{S}\sum_{k,c,s}P(k)\frac{O_{k,c,s}}{C(k)},$$ (S19)

where $S$ represents the number of measurement shots for each circuit instance, $C(k)$ denotes the number of chosen circuits with $k$ errors injected, and $P(k)$ is the respective weight. The value of $S$ for experiments of repetition code and surface code is $150$.

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S5 More experimental details

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Standard error of the measured expectations. As mentioned in Section S4, $S$ measurement shots are taken for each circuit. It allows us to directly calculate the standard deviation of $\overline{O}$ (see Eq. S19) without requiring additional experimental effort. First, we calculate the average expectation value for each shot index $s$ as

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$$\overline{O}_{s}=\sum_{k,c}P(k)\frac{O_{k,c,s}}{C(k)},$$ (S20)

where the sum is taken over the error count $k$ and circuit instance $c$. Next, the unbiased standard deviation of $\overline{O}$ can be obtained by

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$$\sigma\left[\overline{O}\right]=\sqrt{\frac{1}{S(S-1)}\sum_{s}\left(\overline{O}_{s}-\overline{O}\right)^{2}}.$$ (S21)

We note that the standard errors are relatively small for both the repetition code and the surface code, making them difficult to visualize clearly in the main figures. See Fig. S$4$ for an enlarged view of the standard errors for the one-round repetition code.

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Figure S$4$: Standard error of the measured $\langle Z_{\rm L}\rangle$. All insets have a spread of $0.004$ along the $y$-axis, with the data points positioned at the center of the figures.

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Uncorrected expectation values for the repetition code. In Fig. S$5$, we observe that the uncorrected expectation values for different repetition code distances nearly overlap. The slight differences observed for large noise scaling factors are mainly due to the randomness of the circuit instances, which also influence the simulation results.

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Figure S$5$: Uncorrected results of the one-round repetition code. For different repetition code distances, the uncorrected expectation values of $Z_{\rm L}$ remain nearly the same. Dashed lines: noisy numerical simulations.

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Investigating the scalability of ZNE with a fixed error rate per parity-check round. Unlike in the main text, where the unit error probability for each $M$ is adjusted to maintain a fixed total error rate (see Table S3), in this study, the unit error probability in each parity-check round is fixed at $p=3.6\%$ and then the performance of ZNE is evaluated. As depicted in Fig. S$6$, the relative bias, represented by $\delta/\delta_{0}$, consistently remains below 1, confirming the effectiveness of ZNE. The ZNE results demonstrate consistent trends for different code distances and parity-check round numbers, with a larger code distance resulting in a smaller sampling overhead. Additionally, the sampling overhead remains nearly unchanged for different numbers of parity-check rounds. These findings demonstrate the scalability of ZNE for error correction circuits, even with increasing circuit complexity.

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Table S3: Unit error probabilities. For each $M$, the unit error probability is chosen so that the total error rate is fixed.

Round, $M$	1	2	3	4
Unit error probability, $p$ ($\%$)	13.6	9.4	7.2	5.7

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Figure S$6$: Relative bias and sampling overhead of the ZNE. For the implementation of ZNE, we use $K=1$. Note that $\delta/\delta_{0}$ is presented in a linear scale, whereas $\eta$ is shown in a logarithmic scale. Inset: biases without ZNE.

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Preparation of an arbitrary logical state in the distance-3 surface code. In this work, an arbitrary logical state in the distance-3 surface code is prepared using the circuit illustrated in Fig. S$7$. For specific cases, such as the initialization of states $\ket{0_{\rm L}}$ and $\ket{+_{\rm L}}$, the circuit can be further simplified, as described in Ref. [13]. Additionally, the implementation of state initialization in a configuration where two-qubit gates can be performed between nearest-neighbor data qubits is detailed in Ref. [40].

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Figure S$7$: Circuit for the initialization of an arbitrary logical state. The preparation of an arbitrary logical state $\ket{\psi_{\rm L}}=\alpha\ket{0_{\rm L}}+\beta\ket{1_{\rm L}}$ proceeds as follows. First, a single-qubit gate initializes data qubit $D4$ in the state $|\psi\rangle=\alpha|0\rangle+\beta|1\rangle$, with Hadamard gates applied to four representative qubits. Next, six CNOT gates (highlighted in red) are used to create a GHZ-like state — $\alpha|000\rangle+\beta|111\rangle$ — on the vertically aligned data qubits $D1$, $D4$, and $D7$. Finally, multiple layers of CNOT gates are sequentially applied to construct the desired logical state. In particular, for the preparation of state $\ket{0_{\rm L}}$, the six CNOT gates highlighted in red are unnecessary and can be omitted.

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More ZNE results in the distance-3 surface code. The expectation values of the $Z_{\rm L}$ and $X_{\rm L}$ observables are measured as a function of the noise scaling factor $r$ for the states $\ket{0_{\rm L}}$ and $\ket{+_{\rm L}}$, respectively (Fig. S$8$). These results are consistent with those obtained for $\ket{\psi_{\rm L}}$ in the main text but specifically address either bit-flip error or phase-flip error. The measured values of the $X_{\rm L}$ observable, with the initial state set to $|\psi_{\rm L}\rangle=\cos\frac{\pi}{6}|0_{\rm L}\rangle+\sin\frac{\pi}{6}|1_{\rm L}\rangle$, are also shown in the figure. All $\delta$-$\eta$ scatter plots demonstrate the effectiveness of ZNE in the surface code.

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Figure S$8$: Experimental results of ZNE for the $\ket{0_{\rm L}}$ and $\ket{+_{\rm L}}$ states in the distance-3 surface code. a–b, Measured expectation values of the $Z_{\rm L}$ observable for the logical state $\ket{0_{\rm L}}$ and corresponding scatter plots of the bias $\delta$ and sampling overhead $\eta$. c–f, Similar to panels a and b, but with the observable being $X_{\rm L}$ and the initial states being $\ket{+_{\rm L}}$ (panels c and d) and $|\psi_{\rm L}\rangle=\cos\frac{\pi}{6}|0_{\rm L}\rangle+\sin\frac{\pi}{6}|1_{\rm L}\rangle$ (panels e and f).

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Numerical simulations as benchmark. We conduct numerical simulations using two popular open-source frameworks: Stim [36] and Qiskit [42]. For simulations of the repetition code, where the initial preparation of the logical state ($\ket{0_{\rm L}}=\ket{0\cdots 0}$) is nearly perfect, errors introduced by the gate and measurement imperfections are then modeled using a depolarizing channel and a bit-flip channel, respectively. The error rates for these models are experimentally calibrated (see Fig. S$3$ and Table S1). In contrast, for simulations of the surface code, where initial states are imperfectly generated via multiple layers of single-qubit and two-qubit gates, the introduced imperfection is simplified by a single-qubit depolarizing channel uniformly applied to each qubit. The depolarizing rate is calibrated by matching the expectation value of an observable with error injection disabled in the circuit. In this work, $\ket{0_{\rm L}}$ is used as the initial state, and $Z_{\rm L}$ as the observable, resulting in a calibrated depolarizing rate of $0.075$. As shown in Fig. 4 of the main text, this noise model closely aligns with the experimental data.

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S6 Protocol

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To implement the $K$th-order ZNE, we use $K+1$ data points from experiments, $\{(r_{0},\langle O\rangle(r_{0})),(r_{1},\langle O\rangle(r_{1})),\ldots,(r_{K},\langle O\rangle(r_{K}))\}$. Here, $\langle O\rangle(r)$ denotes the expected value of the observable when error probabilities are amplified by a factor of $r$, and $r_{0}=1$ corresponds to the case without noise amplification. Using these data points and the fitting formula $\langle O\rangle(r)=\langle O\rangle_{\rm em}+\sum_{k=\lceil d/2\rceil}^{\lceil d/2\rceil+K-1}a_{k}^{\prime}r^{k}$, we can compute $\langle O\rangle^{I}$ as

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$$\langle O\rangle_{\rm em}=\sum_{k=0}^{K}b_{k}\langle O\rangle(r_{k})$$ (S22)

where $b_{k}=\mathrm{adj}(V)_{0k}$, and $V$ is a Vandermonde-like matrix with elements

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$$V_{ij}=\begin{cases}1,&j=0,\\ r_{i}^{\lceil d/2\rceil+j-1},&j>0.\end{cases}$$ (S23)

We characterize the performance of ZNE using two metrics: the bias $\delta=|\langle O\rangle_{\rm em}-\langle O\rangle_{\rm ideal}|$ characterizes the accuracy, and the sampling overhead $\eta$ characterizes the cost. Next, we focus on the overhead $\eta$. Suppose $N_{tot}$ is the total number of circuit shots used to acquire the $K+1$ data points. To reduce the variance in ZNE, we allocate the shots among the data points according to the importance sampling principle. Specifically, the number of shots used to measure $\langle O\rangle(r_{k})$ is $N_{k}=\frac{|b_{k}|}{\sum_{k=0}^{K}|b_{k}|}N_{tot}$. The variance in the measurement of $\langle O\rangle(r_{k})$ is then given by $\sigma^{2}_{k}=\frac{1-\langle O\rangle^{2}(r_{k})}{N_{k}}$, and the variance of $\langle O\rangle_{\rm em}$ is thus $\sigma^{2}_{\rm em}=\sum_{k=0}^{K}|b_{k}|^{2}\sigma^{2}_{k}$. Here we have assumed that the observable $O$ is a Pauli operator. Without ZNE, if the $N_{tot}$ shots are used to measure $\langle O\rangle(r_{0})$, the variance is $\sigma^{2}_{\rm raw}=\frac{1-\langle O\rangle^{2}(r_{0})}{N_{tot}}$. The sampling overhead reads $\eta=\frac{\sigma^{2}_{\rm em}}{\sigma^{2}_{\rm raw}}$, which is the ratio of the two variances.

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S7 Application to large-scale logical circuits

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We take the surface code as an example to illustrate that our method can be applied to logical circuits at large scale. Assume we have a logic target circuit consisting of $N$ logical gates. Similar to physical operations (see Sec. S1), the $j$th logical gate reads

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$$\mathcal{M}_{j}=(1-P_{j})\mathcal{M}_{j}^{I}+P_{j}\mathcal{M}_{j}^{E},$$ (S24)

where $P_{j}$ represents the logical error rate of the gate. We remark that the logical error rate depends on the physical error rate and, therefore, is a function of the noise amplification factor $r$.

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The expected value of the observable $O$ computed with the circuit is

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$$\langle O\rangle = \operatorname{Tr}(O\mathcal{M}_{N}\cdots\mathcal{M}_{2}\mathcal{M}_{1}\rho)$$ (S25)

$$= (1-\sum_{j=1}^{N}P_{j})\langle O\rangle_{\rm ideal}+\sum_{j=1}^{N}P_{j}\langle O\rangle_{j}+R_{1},$$

where

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$$\langle O\rangle_{\rm ideal} = \operatorname{Tr}(O\mathcal{M}_{N}^{I}\cdots\mathcal{M}_{2}^{I}\mathcal{M}_{1}^{I}\rho)$$ (S26)

is the ideal result,

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$$\langle O\rangle_{j} = \operatorname{Tr}(O\mathcal{M}_{N}^{I}\cdots\mathcal{M}_{j}^{E}\cdots\mathcal{M}_{2}^{I}\mathcal{M}_{1}^{I}\rho)$$ (S27)

is the result when the $j$th logical gate has errors, and the remainder term has the upper bound

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$$R_{1} \leq \|O\|\left[\prod_{j=1}^{N}(1+2P_{j})-(1+2\sum_{j=1}^{N}P_{j})\right]$$ (S28)

$$\leq \|O\|\left[e^{2P_{tot}}-(1+2P_{tot})\right],$$

where $P_{tot}=\sum_{j=1}^{N}P_{j}$ is the total error rate.

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Now, we approximate each logical error rate with a polynomial, i.e.

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$$P_{j}(r)=\sum_{k=\lceil d/2\rceil}^{\lceil d/2\rceil+K-1}a_{j,k}r^{k}+\Delta_{j}(r),$$ (S29)

and $\Delta_{j}(r)$ denotes the error in the approximation. With this approximation, we can re-express the expected value as

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$$\langle O\rangle(r) = \langle O\rangle_{\rm ideal}+\sum_{k=\lceil d/2\rceil}^{\lceil d/2\rceil+K-1}a_{k}r^{k}$$ (S30)

$$+R_{1}(r)+R_{2}(r),$$

where

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$$a_{k}=\sum_{j=1}^{N}(\langle O\rangle_{j}-\langle O\rangle_{\rm ideal})a_{j,k}$$ (S31)

and

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$$R_{2}(r) = \sum_{j=1}^{N}(\langle O\rangle_{j}-\langle O\rangle_{\rm ideal})\Delta_{j}(r).$$ (S32)

Substituting the expression of $\langle O\rangle(r)$ into the $K$th-order extrapolation formula Eq. (S22), we obtain the bias

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$$\delta = \left|\sum_{k=0}^{K}b_{k}[R_{1}(r_{k})+R_{2}(r_{k})]\right|\leq\tilde{\delta}_{1}+\tilde{\delta}_{2},$$ (S33)

where

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$$\tilde{\delta}_{1} = \|O\|\sum_{k=0}^{K}|b_{k}|\left[e^{2P_{tot}(r_{k})}-\left(1+2P_{tot}(r_{k})\right)\right]$$ (S34)

and

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$$\tilde{\delta}_{2} = 2N\|O\|\left|\sum_{k=0}^{K}b_{k}\Delta_{j}(r_{k})\right|$$ (S35)

are upper bounds of contributions by $R_{1}$ and $R_{2}$ terms, respectively. The first term $\tilde{\delta}_{1}$ is the error due to the second-order contribution of logical error rates, i.e.

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$$\tilde{\delta}_{1} \simeq 2\|O\|\sum_{k=0}^{K}|b_{k}|P_{tot}(r_{k})^{2}.$$ (S36)

If we choose a sufficiently large code distance such that $P_{tot}(r_{k})$ is much smaller than one, the first term is much smaller than the raw bias before error mitigation, which has the upper bound

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$$\tilde{\delta}_{0} = \|O\|\left[e^{2P_{tot}(1)}-1\right]\simeq 2\|O\|P_{tot}(1).$$ (S37)

The second term $\tilde{\delta}_{2}$ is the error due to approximating logical error rates $P_{j}(r)$ with polynomials. In the limit that the physical error rate $p$ approaches zero, the logical error rate behaves as $P_{j}(r)\propto p^{\lceil d/2\rceil}$ [43, 44], suggesting that the $K=1$ extrapolation is sufficient in the low physical error rate regime. When $p$ is finite, the logical error rate deviates from $P_{j}(r)\propto p^{\lceil d/2\rceil}$, and we have to adapt the extrapolation function accordingly. Next, we use numerical calculations to estimate the bias in the polynomial extrapolation.

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Figure S$9$: Numerical results of ZNE on a circuit of $N$ surface-code idle gates. We take the physical error rate $p=10^{-3}$, which is amplified to $r_{k}p$ in ZNE; we choose the amplification factors $r_{k}=k^{1/\lceil d/2\rceil}$, where $k=1,2,\ldots,K+1$. The bias before ZNE is $\delta_{0}=|\langle O\rangle(1)-\langle O\rangle(0)|$, where $\langle O\rangle(0)$ is the ideal value.

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To estimate the bias and cost numerically, we consider a quantum memory circuit consisting of applying $N$ idle gates on a logical qubit and take the logical error rate per gate reported in Ref. [27]. We choose the observable as $Y$, such that the expectation value is affected by both logical $X$ and $Z$ errors. Let $P_{L}(r)$ be the sum of logical $X$ and $Z$ error rates. The observable expectation value is taken as $\langle O\rangle(r)=[1-2P_{L}(r)]^{N}$. Then, we apply ZNE to $\langle O\rangle(r)$, and the results are shown in Fig. S$9$.

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Although the above numerical results are obtained from quantum memory circuits, we conjecture that general computing circuits yield similar results. Memory circuits are composed of repeatedly applying parity-check measurements on a fixed lattice. Practical protocols of quantum computing in surface codes include, for instance, braiding transformation [15] and lattice surgery [41], in which circuits are also composed of repeatedly applying parity-check measurements, however, on a lattice that deforms between certain parity-check cycles. Because the dominant operations are the same in memory circuits and such computing circuits, they should yield similar behavior of logical error rates (as functions of physical error rates and the code distance). In addition to braiding transformation and lattice surgery, universal quantum computing in surface codes also requires magic state injection and distillation [45, 46, 15]. Magic state errors decrease with the level of distillation. As long as the distillation level is adequately high, the post-distillation magic state errors are dominated by logical errors in lattice surgery operations, and the contribution of raw magic state errors (errors in injected magic states before distillation) is negligible; otherwise, we may need to modify the extrapolation function to include the impact of raw magic state errors: suppose the distilled magic state error rate is $\propto p^{L}$, where $L$ is an integer depending on the distillation level, we can add the term $p^{L}$ to the extrapolation function.

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So far, we have only considered polynomial extrapolation functions. The use of other extrapolation functions could improve the performance. In ZNE on NISQ circuit, it has been shown experimentally that the exponential extrapolation outperforms polynomial extrapolation [47, 8]. For example, the logical error rate function reported in Ref. [27] is a candidate worth exploring. Given such candidate functions, we can benchmark and verify them through Clifford circuits [23, 24]: we can simulate the Clifford circuits on a classical computer to obtain the ideal result $\langle O\rangle_{\rm ideal}$, such that we can evaluate the bias as well as the cost. In this way, we can compare the candidate the functions and identify the suitable ones.

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