In Scalability First Approach, EeroQ Achieves Tape-Out of Its ‘Wonder Lake’ Chip

Insider Brief

• EeroQ achieves tape-out of new chip at US semiconductor foundry, which means it’s ready for fabrication and production.
• The company uses a helium approach for its quantum processor design.
• Ultimately, the company says this is a huge leap toward a quantum computer design that is powerful, small and scalable.

In an important advance, EeroQ announced it achieved tape-out of  the company’s “Wonder Lake” chip, according to a blog post on the company’s website. The milestone was set at a US semiconductor foundry, and it brings EeroQ one step closer to realizing their vision of scalable quantum processors, the company notes.

“Tape out” refers to the stage in semiconductor manufacturing where the finalized chip design is sent to the foundry for mass production and fabrication.

“This scaling architecture has passed the rigorous design checks required for compatibility with today’s standard chip manufacturing process (CMOS),” Nick Farina, EeroQ CEO, explains in the blog.

This achievement is expected to pave the way for future quantum devices that can harness the power of single electrons as qubits, positioning EeroQ as a leading player in the quantum computing industry.

The Wonder Lake chip boasts 2,432 future qubits, an essential building block for quantum processors. What sets this system apart is its efficiency, requiring only around 30 control lines, signifying a significant reduction in complexity compared to previous quantum architectures.

At the core of the Wonder Lake chip lies the concept of isolated electron spins suspended above the surface of liquid helium (eHe). This approach was initially proposed in a 1999 paper in Science, which outlined the potential of utilizing the vertical motion of electrons above the helium surface, known as “Rydberg states” of electron motion, for quantum computation. Building on these ideas, EeroQ’s Chief Technology Officer, Stephen Lyon, proposed in 2006 that the spin state of electrons offers even greater advantages, such as vastly enhanced quantum coherence exceeding 10 seconds.

The unique combination of tiny electron size, the pristine environment of superfluid helium, CMOS infrastructure, and the absence of modular interconnects sets EeroQ’s quantum devices apart from those of other companies, possibly offering a competitive edge in the quantum computing landscape.

EeroQ’s strategy involves fabricating most of their future processors on single chips, which are produced in commercial CMOS foundries. Upon receiving the wafers from the foundry, a thin layer of liquid helium is added, and electrons are deposited into on-chip reservoirs. Their spin states are then initialized, and computation can begin.

Each electron qubit hovers approximately 10 nanometers above the helium surface, being trapped by control voltages from electrodes located beneath the helium. This precise positioning allows for controlled interactions and gate operations, vital for quantum computation.

The next crucial step for EeroQ is the demonstration of a two-qubit gate. This will be based on the well-understood physics of the magnetic dipole-dipole interaction, which can be integrated into the foundry chip . By leveraging the small magnetic spins of electrons, EeroQ plans to implement highly accurate two-qubit gates. The magnetic field of each electron is an exceptionally well-known quantity in physics, with precision measurements spanning at least 12 decimal places.

To achieve the necessary precision for quantum gates, EeroQ will rely on engineering microstructures on the CMOS chip that hold the electrons. The inherent accuracy of the CMOS process is projected to reduce fabrication-related quantum gate errors to a mere 0.01%.

EeroQ’s long-term goal is to scale their quantum computing system from single qubits to an impressive 10,000 qubits and beyond.

However, according to the blog post, the company continues to work on their immediate goals:

● 10+ second qubit coherence
● High qubit connectivity
● Identical qubits, controllable in parallel with only a few voltages on a CMOS chip
● Mobile qubits on the helium surface (providing up to a 50x reduction in overhead needed for error correction)
● 99.9% gate fidelities
● A system without modular interconnects … so that all the quantum computing power you’ll need will be in a device the size of your thumbnail!

Their approach of building a quantum computer in reverse, starting from the scale, holds great promise for overcoming the challenges of quantum scalability.

“There are two particularly challenging parts to making a useful quantum computer: high-quality quantum gates, and a path to scale,” Farina writes. “With our latest work, we are proud to join the leadership ranks on scalability. Together with recent advances in error mitigation and more efficient algorithms, we can see the commercial quantum future coming together sooner than expected – led by the ability to leverage our architectural advantage to scale rapidly.”

Read the complete report on the advance here.