Researchers Propose Thermodynamic Computing Architecture That Could Dramatically Reduce AI Energy Use

Insider Brief

• Researchers proposed a transistor-based thermodynamic computing architecture that could rmatch GPU-based performance while consuming about 10,000 times less energy.
• The system uses probabilistic hardware, Boltzmann machines and denoising models to generate outputs by gradually turning random noise into structured data.
• The results are based on simulations and a tested random-number circuit, with scaling to larger AI workloads still unresolved.

As artificial intelligence drives an unprecedented buildout of power-hungry data centers, researchers are exploring computing architectures that move beyond the graphics processing units (GPUs). One new proposal to address this is a probabilistic computer built from conventional transistors that researchers say could perform certain AI tasks with a fraction of the energy required by today’s hardware.

The study, published in npj Unconventional Computing, describes what the researchers call a Denoising Thermodynamic Computer Architecture, or DTCA. Rather than relying on deterministic calculations like conventional processors, the proposed architecture uses controlled randomness to perform probabilistic computations directly in hardware. The authors estimate that, on a simple image-generation benchmark, such a system could match GPU-based performance while consuming roughly 10,000 times less energy per generated sample.

The work was led by researchers from Extropic Corp. and the Massachusetts Institute of Technology, including quantum information scientist Isaac Chuang.

Although the proposed computer is entirely classical and does not perform quantum computation, its underlying concepts will be familiar to many in the quantum computing community. The architecture draws on ideas from statistical mechanics, Boltzmann machines and Ising models — mathematical frameworks also used in quantum annealing and quantum-inspired optimization.

Alongside quantum computers, neuromorphic processors, photonic accelerators and analog AI chips, thermodynamic computing has emerged as another candidate architecture aimed at improving efficiency for specialized workloads.

Moving Beyond the GPU

The study focuses in on a problem becoming increasingly difficult for the AI industry to ignore.

“The unprecedented recent investment in large-scale AI systems will soon put a strain on the world’s energy infrastructure,” the team writes. “Every year, U.S. firms are spending an amount larger than the inflation-adjusted cost of the Apollo program on AI-focused data centers. By 2030, these data centers could consume around 10% of all of the energy produced in the U.S.”

The issue is that training and deploying large AI models requires enormous computing resources, prompting billions of dollars in investment in new data centers and raising concerns about future electricity demand. Rather than attempting to make existing GPU architectures incrementally more efficient, the researchers suggest that AI algorithms themselves have been shaped by the available hardware, a phenomenon sometimes described as the “hardware lottery.” They suggest different hardware could enable fundamentally different — and potentially more energy-efficient — approaches to machine learning.

Their proposal centers on probabilistic computing, a field that performs calculations by manipulating probability distributions instead of relying solely on deterministic arithmetic.

Previous probabilistic computers have typically implemented large energy-based models directly in hardware. While attractive in principle, those systems become increasingly difficult to sample efficiently as the complexity of the data grows. The resulting slowdown largely offsets their theoretical efficiency advantages.

This work attempts to overcome that limitation by borrowing a concept from diffusion models, one of the machine learning techniques behind modern image generators.

Instead of asking one large probabilistic model to represent an entire dataset, the researchers divide the task into a sequence of simpler denoising steps. Each step incrementally transforms random noise into structured data, reducing the computational burden placed on any individual model while avoiding what the authors describe as the “mixing-expressivity tradeoff” that has limited earlier probabilistic hardware.

An All-Transistor Design

Unlike several previous proposals for probabilistic computing, the architecture does not depend on exotic hardware components, according to the study.

The researchers instead designed their system around conventional CMOS transistors, using specially designed transistor circuits to generate programmable random numbers. Those random bits form the foundation of the probabilistic computations performed throughout the chip.

The proposed architecture organizes thousands of these sampling circuits into arrays implementing sparse Boltzmann machines., which are AI models that learn patterns in data by assigning probabilities to different possible outcomes. Rather than constructing one massive probabilistic model, multiple smaller models are chained together to progressively refine noisy data into meaningful outputs.

According to the team, the modular design could eventually be implemented in several ways, including multiple dedicated hardware blocks on a single chip or collections of communicating chips executing different stages of the computation.

To support the feasibility of the hardware, the team fabricated and tested an experimental transistor-based random-number generator. Laboratory measurements showed the circuit behaved as expected and remained robust under simulated manufacturing variations commonly encountered during semiconductor fabrication.

Benchmark Results

To evaluate the architecture, the researchers simulated the proposed hardware using GPUs while incorporating measurements from the physical random-number generator into their energy model.

The primary benchmark used Fashion-MNIST, a relatively simple image dataset frequently employed to evaluate machine learning algorithms.

The researchers estimate their architecture could generate images with performance comparable to GPU implementations while requiring approximately 10,000 times less energy per generated sample. The estimate reflects the projected energy consumption of a future hardware implementation rather than measurements from a complete working computer.

The team also explored a hybrid approach combining conventional neural networks with thermodynamic hardware. Using a small neural network to compress CIFAR-10 images into a binary representation before processing them with the probabilistic computer, the researchers found they could achieve performance comparable to a traditional generative adversarial network while using roughly one-tenth as many neural network parameters in the deterministic portion of the system.

This hybrid architecture may ultimately prove more practical than expecting probabilistic hardware to solve every aspect of machine learning independently, according to the researchers.

Relevance Beyond AI

Although the study focuses on AI inference, it may also have an impact in the growing diversification of computing hardware.

For decades, improvements in computing largely depended on scaling general-purpose processors before GPUs became the dominant accelerator for machine learning. Today, however, researchers increasingly envision future computing systems built from multiple specialized processors — including quantum computers — each optimized for particular workloads.

Quantum computers are expected to address certain optimization, chemistry and cryptography problems. Photonic processors aim to accelerate neural networks using light. Neuromorphic chips emulate aspects of biological brains for energy-efficient inference.

Thermodynamic computing represents another attempt to identify workloads that can benefit from specialized hardware grounded in statistical physics rather than conventional digital logic.

For quantum computing researchers, the work also shows the growing influence of ideas borrowed from physics — including Boltzmann distributions, stochastic sampling and Ising models — across emerging computing architectures.

Next Steps and Challenges

Despite the promising energy estimates, the researchers devote considerable attention to the limitations of their work.

For example, the reported results rely on simulations rather than a complete hardware implementation. Only the transistor-based random-number generator has been physically demonstrated, while the broader computing architecture remains theoretical. The benchmark datasets, Fashion-MNIST and CIFAR-10, are also far simpler than modern large language models or state-of-the-art image-generation systems.

The researchers also acknowledge they have not yet solved how to scale these systems to represent increasingly complex data while maintaining efficient sampling — one of the central challenges facing probabilistic computing.

Simply increasing the size or connectivity of the probabilistic models eventually reduces their effectiveness, suggesting additional algorithmic advances will be needed before the architecture could address the largest AI workloads. The team indicates that future progress will likely depend on tighter integration between probabilistic hardware and conventional neural networks rather than replacing existing AI accelerators outright.

Even though there are challenges that remain, the researchers add that this study should be seen as a solid “first step” toward a new AI system worthy of further investment and investigation

“The broad analysis presented in this manuscript, which spans from high-level algorithmic ideas to laboratory measurements of novel analog circuits, establishes, for the first time, that a probabilistic computing system could substantially outperform traditional AI hardware,” the researchers write. “Taken as a whole, this work presents a compelling case for significant investment in the continued development of low-energy probabilistic computing systems.”